/**
  ******************************************************************************
  * @file    ys32f030_adc.h
  * @author  YSPRING Application Team
  * @version V1.0.1
  * @date    2023.3.16
  * @brief   This file contains all the functions prototypes for the ADC firmware 
  *          library.
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __YS32F030_ADC_H
#define __YS32F030_ADC_H

#ifdef __cplusplus
 extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "ys32f030.h"
#include "system_ys32f030.h"

/** @addtogroup YS32F030_StdPeriph_Driver
  * @{
  */

/** @addtogroup ADC
  * @{
  */

/* Exported types ------------------------------------------------------------*/

/** 
  * @brief  ADC Init structure definition
  */
  
typedef struct
{
  uint32_t ClockMode;                     /*!< Selects the ADC Clock Mode.
                                                 This parameter can be a value of @ref ADC_ClockMode */

  uint32_t ADC_ContinuousConvMode;          /*!< Specifies whether the conversion is performed in
                                                 Continuous or Single mode.
                                                 This parameter can be a value of @ref ADC_SonvMode */

  uint32_t ADC_ExternalTrigConvEdge;        /*!< Selects the external trigger Edge and enables the
                                                 trigger of a regular group. This parameter can be a value
                                                 of @ref ADC_external_trigger_edge_conversion */

  uint32_t ADC_ExternalTrigConv;            /*!< Defines the external trigger used to start the analog
                                                 to digital conversion of regular channels. This parameter
                                                 can be a value of @ref ADC_external_trigger_sources_for_channels_conversion */

  uint32_t ADC_ExternalTrigInjectedConvEdge;    /*!< Selects the external trigger Edge and enables the
                                                 trigger of a injected group. This parameter can be a value
                                                 of @ref ADC_external_trigger_edge_conversionJSQ */

  uint32_t ADC_ExternalTrigInjectedConv;        /*!< Defines the external trigger used to start the analog
                                                 to digital conversion of injected channels. This parameter
                                                 can be a value of @ref ADC_external_trigger_sources_for_channels_conversionJSQ */

  uint32_t ADC_DataAlign;                   /*!< Specifies whether the ADC data alignment is left or right.
                                                 This parameter can be a value of @ref ADC_data_align */

  uint32_t  ADC_ScanMode;                   /*!< Specifies in which direction the channels will be scanned
                                                 in the sequence. 
                                                 This parameter can be a value of @ref ADC_ScanMode */
}ADC_InitTypeDef;


/* Exported constants --------------------------------------------------------*/

/** @defgroup ADC_Exported_Constants
  * @{
  */ 
#define IS_ADC_ALL_PERIPH(PERIPH)                  ((PERIPH) == ADC)

/** @defgroup ADC_ClockMode
  * @{
  */ 

#define ADC_ClockMode_PCLK                        (uint32_t)(ADC_CR2_CKMODE_PCLK)
#define ADC_ClockMode_PCLK_Div2                   (uint32_t)(ADC_CR2_CKMODE_PCLK2)
#define ADC_ClockMode_PCLK_Div4                   (uint32_t)(ADC_CR2_CKMODE_PCLK4)
#define ADC_ClockMode_PCLK_Div6                   (uint32_t)(ADC_CR2_CKMODE_PCLK6)
#define ADC_ClockMode_PCLK_Div8                   (uint32_t)(ADC_CR2_CKMODE_PCLK8)
#define ADC_ClockMode_HSI                         (uint32_t)(ADC_CR2_CKMODE_HSI)
#define ADC_ClockMode_HSI_Div2                    (uint32_t)(ADC_CR2_CKMODE_HSI2)
#define ADC_ClockMode_HSI_Div4                    (uint32_t)(ADC_CR2_CKMODE_HSI4)
#define ADC_ClockMode_HSI_Div6                    (uint32_t)(ADC_CR2_CKMODE_HSI6)
#define ADC_ClockMode_HSI_Div8                    (uint32_t)(ADC_CR2_CKMODE_HSI8)

#define IS_ADC_CLOCKMODE(CLOCK) (((CLOCK) == ADC_ClockMode_PCLK)     ||\
				                         ((CLOCK) == ADC_ClockMode_PCLK_Div2) ||\
                                 ((CLOCK) == ADC_ClockMode_PCLK_Div4) ||\
                                 ((CLOCK) == ADC_ClockMode_PCLK_Div6) ||\
                                 ((CLOCK) == ADC_ClockMode_PCLK_Div8) ||\
                                 ((CLOCK) == ADC_ClockMode_HSI)       ||\
                                 ((CLOCK) == ADC_ClockMode_HSI_Div2)  ||\
                                 ((CLOCK) == ADC_ClockMode_HSI_Div4)  ||\
                                 ((CLOCK) == ADC_ClockMode_HSI_Div6)  ||\
				                         ((CLOCK) == ADC_ClockMode_HSI_Div8))

/**
  * @}
  */ 

/** @defgroup ADC_Current
  * @{
  */ 
#define ADC_Current_16uA                       ADC_CR2_CUR_00
#define ADC_Current_20uA                       ADC_CR2_CUR_01
#define ADC_Current_24uA                       ADC_CR2_CUR_10
#define ADC_Current_28uA                       ADC_CR2_CUR_11

#define IS_ADC_CURRENT(CURRENT) (((CURRENT) == ADC_Current_16uA) || \
                                 ((CURRENT) == ADC_Current_20uA) || \
                                 ((CURRENT) == ADC_Current_24uA) || \
                                 ((CURRENT) == ADC_Current_28uA))

/**
  * @}
  */ 

/** @defgroup ADC_external_trigger_edge_conversion 
  * @{
  */ 
#define ADC_ExternalTrigConvEdge_None              ((uint32_t)0x00000000)
#define ADC_ExternalTrigConvEdge_EN                ADC_CR2_EXTTRIG

#define IS_ADC_EXT_TRIG_EDGE(EDGE) (((EDGE) == ADC_ExternalTrigConvEdge_None) || \
                                    ((EDGE) == ADC_ExternalTrigConvEdge_EN))
/**
  * @}
  */ 
  
/** @defgroup ADC_external_trigger_edge_conversionJSQ 
  * @{
  */ 
#define ADC_ExternalTrigInjectedConvEdge_None          ((uint32_t)0x00000000)
#define ADC_ExternalTrigInjectedConvEdge_EN            ADC_CR2_JEXTTRIG

#define IS_ADC_EXT_TRIG_EDGE_JSQ(EDGE) (((EDGE) == ADC_ExternalTrigInjectedConvEdge_None) || \
                                        ((EDGE) == ADC_ExternalTrigInjectedConvEdge_EN))
/**
  * @}
  */ 


/** @defgroup ADC_injected_channel_selection 
  * @{
  */ 
#define ADC_InjectedChannel_1                       ((uint32_t)0x20)
#define ADC_InjectedChannel_2                       ((uint32_t)0x1C)
#define ADC_InjectedChannel_3                       ((uint32_t)0x18)
#define ADC_InjectedChannel_4                       ((uint32_t)0x14)
#define ADC_InjectedChannel_5                       ((uint32_t)0x10)
#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
                                          ((CHANNEL) == ADC_InjectedChannel_2) || \
                                          ((CHANNEL) == ADC_InjectedChannel_3) || \
																					((CHANNEL) == ADC_InjectedChannel_4) || \
                                          ((CHANNEL) == ADC_InjectedChannel_5))
/**
  * @}
  */ 

/** @defgroup ADC_injected_offset 
  * @{
  */ 
#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
/**
  * @}
  */ 










/** @defgroup ADC regular discontinuous mode number verification
  * @{
  */
#define IS_ADC_REGULAR_DISCONT_NUMBER(NUMBER) (((NUMBER) >= 1U) && ((NUMBER) <= 9U))
/**
  * @}
  */

/** @defgroup ADC_external_trigger_sources_for_channels_conversion
  * @{
  */ 

/* TIM1 */
#define ADC_ExternalTrigConv_T1_CC1                (ADC_CR2_EXTSEL_T1CC1)
#define ADC_ExternalTrigConv_T1_CC2                (ADC_CR2_EXTSEL_T1CC2)
#define ADC_ExternalTrigConv_T1_CC3                (ADC_CR2_EXTSEL_T1CC3)

/* TIM3 */
#define ADC_ExternalTrigConv_T3_CC2                (ADC_CR2_EXTSEL_T3CC2)

/* TIM15 */
#define ADC_ExternalTrigConv_T15_CC2               (ADC_CR2_EXTSEL_T15CC2)
#define ADC_ExternalTrigConv_T15_TRGO              (ADC_CR2_EXTSEL_T15TRGO)

#define ADC_ExternalTrigConv_EXTI4                 (ADC_CR2_EXTSEL_EXTI4)
#define ADC_ExternalTrigConv_SWSTART               (ADC_CR2_EXTSEL_SWSTART)

#define IS_ADC_EXTERNAL_TRIG_CONV(CONV) (((CONV) == ADC_ExternalTrigConv_T1_CC1)   || \
                                         ((CONV) == ADC_ExternalTrigConv_T1_CC2)   || \
                                         ((CONV) == ADC_ExternalTrigConv_T1_CC3)   || \
                                         ((CONV) == ADC_ExternalTrigConv_T3_CC2)   || \
                                         ((CONV) == ADC_ExternalTrigConv_T15_CC2)  || \
                                         ((CONV) == ADC_ExternalTrigConv_T15_TRGO) || \
                                         ((CONV) == ADC_ExternalTrigConv_EXTI4)    || \
                                         ((CONV) == ADC_ExternalTrigConv_SWSTART)) 
/**
  * @}
  */ 

/** @defgroup ADC_external_trigger_sources_for_channels_conversionJSQ
  * @{
  */ 

/* TIM1 */
#define ADC_ExternalTrigInjectedConv_T1_TRGO               (ADC_CR2_JEXTSEL_TIM1_TRGO)
#define ADC_ExternalTrigInjectedConv_T1_CC4                (ADC_CR2_JEXTSEL_TIM1_CC4)
#define ADC_ExternalTrigInjectedConv_T1_CC3                (ADC_CR2_JEXTSEL_TIM1_CC3)

/* TIM3 */
#define ADC_ExternalTrigInjectedConv_T3_CC1                (ADC_CR2_JEXTSEL_TIM3_CC1)
#define ADC_ExternalTrigInjectedConv_T3_TRGO               (ADC_CR2_JEXTSEL_TIM3_TRGO)

/* TIM15 */
#define ADC_ExternalTrigInjectedConv_T15_CC1               (ADC_CR2_JEXTSEL_TIM15_CC1)

#define ADC_ExternalTrigInjectedConv_EXTI9                 (ADC_CR2_JEXTSEL_EXTI9)
#define ADC_ExternalTrigInjectedConv_SWSTART               (ADC_CR2_JEXTSEL_SWSTART)

#define IS_ADC_EXTERNAL_TRIG_CONV_JSQ(CONV) (((CONV) == ADC_ExternalTrigInjectedConv_T1_TRGO)  || \
                                             ((CONV) == ADC_ExternalTrigInjectedConv_T1_CC4)   || \
                                             ((CONV) == ADC_ExternalTrigInjectedConv_T1_CC3)   || \
                                             ((CONV) == ADC_ExternalTrigInjectedConv_T3_CC1)   || \
                                             ((CONV) == ADC_ExternalTrigInjectedConv_T3_TRGO)  || \
                                             ((CONV) == ADC_ExternalTrigInjectedConv_T15_CC1)  || \
                                             ((CONV) == ADC_ExternalTrigInjectedConv_EXTI9)    || \
                                             ((CONV) == ADC_ExternalTrigInjectedConv_SWSTART)) 
/**
  * @}
  */ 

 /** @defgroup ADC_data_align 
  * @{
  */ 
  
#define ADC_DataAlign_Right                        ((uint32_t)0x00000000)
#define ADC_DataAlign_Left                         (ADC_CR2_ALIGN)

#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
                                  ((ALIGN) == ADC_DataAlign_Left))
/**
  * @}
  */
  
/** @defgroup ADC_ConvMode 
  * @{
  */ 
  
#define ADC_ContinuousConvMode_OFF           ((uint32_t)0x00000000)
#define ADC_ContinuousConvMode_ON            (ADC_CR2_CONT)

#define IS_CONTINUOUS_CONV_MODE(CONV_MODE) (((CONV_MODE) == ADC_ContinuousConvMode_OFF) || \
                                            ((CONV_MODE) == ADC_ContinuousConvMode_ON))
/**
  * @}
  */ 

/** @defgroup ADC_ScanMode 
  * @{
  */ 
  
#define ADC_ScanMode_OFF                     ((uint32_t)0x00000000)
#define ADC_ScanMode_ON                      (ADC_CR1_SCAN)

#define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_ScanMode_OFF) || \
                                     ((SCAN_MODE) == ADC_ScanMode_ON))
/**
  * @}
  */ 

/** @defgroup ADC_analog_watchdog_selection 
  * @{
  */ 
  
#define ADC_AnalogWatchdog_Channel_None              ((uint32_t)0)
#define ADC_AnalogWatchdog_Channel_1                 ((uint32_t)1)
#define ADC_AnalogWatchdog_Channel_2                 ((uint32_t)2)
#define ADC_AnalogWatchdog_Channel_3                 ((uint32_t)3)
#define ADC_AnalogWatchdog_Channel_4                 ((uint32_t)4)
#define ADC_AnalogWatchdog_Channel_5                 ((uint32_t)5)
#define ADC_AnalogWatchdog_Channel_6                 ((uint32_t)6)
#define ADC_AnalogWatchdog_Channel_7                 ((uint32_t)7)
#define ADC_AnalogWatchdog_Channel_8                 ((uint32_t)8)
#define ADC_AnalogWatchdog_Channel_9                 ((uint32_t)9)
#define ADC_AnalogWatchdog_Channel_10                ((uint32_t)10) 
#define ADC_AnalogWatchdog_Channel_11                ((uint32_t)11) 
#define ADC_AnalogWatchdog_Channel_12                ((uint32_t)12) 
#define ADC_AnalogWatchdog_Channel_13                ((uint32_t)13) 
#define ADC_AnalogWatchdog_Channel_14                ((uint32_t)14) 
#define ADC_AnalogWatchdog_Channel_15                ((uint32_t)15) 
#define ADC_AnalogWatchdog_Channel_16                ((uint32_t)16)
#define ADC_AnalogWatchdog_Channel_17                ((uint32_t)17)
#define ADC_AnalogWatchdog_Channel_18                ((uint32_t)18)
#define ADC_AnalogWatchdog_Channel_19                ((uint32_t)19)
#define ADC_AnalogWatchdog_Channel_20                ((uint32_t)20)


#define IS_ADC_ANALOG_WATCHDOG_CHANNEL(CHANNEL) (((CHANNEL) == ADC_AnalogWatchdog_Channel_None)|| \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_1)  || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_2)  || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_3)  || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_4)  || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_5)  || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_6)  || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_7)  || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_8)  || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_9)  || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_10) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_11) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_12) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_13) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_14) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_15) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_16) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_17) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_18) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_19) || \
                                                 ((CHANNEL) == ADC_AnalogWatchdog_Channel_20))
/**
  * @}
  */ 
  
/** @defgroup ADC_sampling_times 
  * @{
  */ 

#define ADC_SampleTime_1_5Cycles                     ((uint32_t)0)
#define ADC_SampleTime_2_5Cycles                     ((uint32_t)1)
#define ADC_SampleTime_3_5Cycles                     ((uint32_t)2)
#define ADC_SampleTime_4_5Cycles                     ((uint32_t)3)
#define ADC_SampleTime_5_5Cycles                     ((uint32_t)4)
#define ADC_SampleTime_6_5Cycles                     ((uint32_t)5)
#define ADC_SampleTime_7_5Cycles                     ((uint32_t)6)
#define ADC_SampleTime_8_5Cycles                     ((uint32_t)7)
#define ADC_SampleTime_9_5Cycles                     ((uint32_t)8)
#define ADC_SampleTime_10_5Cycles                    ((uint32_t)9)
#define ADC_SampleTime_11_5Cycles                    ((uint32_t)10)
#define ADC_SampleTime_15_5Cycles                    ((uint32_t)11)
#define ADC_SampleTime_31_5Cycles                    ((uint32_t)12)
#define ADC_SampleTime_63_5Cycles                    ((uint32_t)13)
#define ADC_SampleTime_127_5Cycles                   ((uint32_t)14)
#define ADC_SampleTime_255_5Cycles                   ((uint32_t)15)

#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1_5Cycles)    || \
                                  ((TIME) == ADC_SampleTime_2_5Cycles  )  || \
                                  ((TIME) == ADC_SampleTime_3_5Cycles  )  || \
                                  ((TIME) == ADC_SampleTime_4_5Cycles  )  || \
                                  ((TIME) == ADC_SampleTime_5_5Cycles  )  || \
                                  ((TIME) == ADC_SampleTime_6_5Cycles  )  || \
                                  ((TIME) == ADC_SampleTime_7_5Cycles  )  || \
                                  ((TIME) == ADC_SampleTime_8_5Cycles  )  || \
                                  ((TIME) == ADC_SampleTime_9_5Cycles  )  || \
                                  ((TIME) == ADC_SampleTime_10_5Cycles )  || \
                                  ((TIME) == ADC_SampleTime_11_5Cycles )  || \
                                  ((TIME) == ADC_SampleTime_15_5Cycles )  || \
                                  ((TIME) == ADC_SampleTime_31_5Cycles )  || \
                                  ((TIME) == ADC_SampleTime_63_5Cycles )  || \
                                  ((TIME) == ADC_SampleTime_127_5Cycles)  || \
                                  ((TIME) == ADC_SampleTime_255_5Cycles))
/**
  * @}
  */ 

/** @defgroup ADC_thresholds 
  * @{
  */ 
  
#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)

/**
  * @}
  */ 

/** @defgroup ADC_channels 
  * @{
  */ 
#define ADC_Channel_1                              1
#define ADC_Channel_2                              2
#define ADC_Channel_3                              3
#define ADC_Channel_4                              4
#define ADC_Channel_5                              5
#define ADC_Channel_6                              6
#define ADC_Channel_7                              7
#define ADC_Channel_8                              8
#define ADC_Channel_9                              9
#define ADC_Channel_10                             10
#define ADC_Channel_11                             11
#define ADC_Channel_12                             12
#define ADC_Channel_13                             13
#define ADC_Channel_14                             14
#define ADC_Channel_15                             15
#define ADC_Channel_16                             16
#define ADC_Channel_17                             17
#define ADC_Channel_18                             18
#define ADC_Channel_TempSensor                     ((uint32_t)19)
#define ADC_Channel_Vrefint                        ((uint32_t)20)

#define IS_ADC_CHANNEL(CHANNEL)       ((CHANNEL) < 20)
#define IS_ADC_REGULAR_RANK(RANK)     ((RANK) <= 20 && (RANK) >= 1)
#define IS_ADC_INJECTED_RANK(RANK)    ((RANK) <= 5 && (RANK) >= 1)

/**
  * @}
  */ 
  
/** @defgroup ADC_interrupts_definition 
  * @{
  */ 
#define ADC_IT_EOC                                 ADC_CR1_EOCIE
#define ADC_IT_AWD                                 ADC_CR1_AWDIE
#define ADC_IT_JEOC                                ADC_CR1_JEOCIE
#define ADC_IT_EOSEQ                               ADC_CR1_EOSEQIE
#define ADC_IT_JEOSEQ                              ADC_CR1_JEOSEQIE
#define ADC_IT_EOS                                 ADC_CR1_EOSIE

#define IS_ADC_CONFIG_IT(IT) (((IT) == ADC_IT_EOC)    || ((IT) == ADC_IT_AWD)  || \
                              ((IT) == ADC_IT_JEOC)   || ((IT) == ADC_IT_EOSEQ)|| \
                              ((IT) == ADC_IT_JEOSEQ) || ((IT) == ADC_IT_EOS))
/**
  * @}
  */ 

/** @defgroup ADC_flags_definition 
  * @{
  */ 
  
#define ADC_FLAG_AWD                                ADC_SR_AWD
#define ADC_FLAG_ADRDY                              ADC_SR_ADRDY
#define ADC_FLAG_EOSMP                              ADC_SR_EOSMP
#define ADC_FLAG_EOC                                ADC_SR_EOC
#define ADC_FLAG_JEOC                               ADC_SR_JEOC
#define ADC_FLAG_EOSEQ                              ADC_SR_EOSEQ
#define ADC_FLAG_JEOSEQ                             ADC_SR_JEOSEQ
#define ADC_FLAG_EOS                                ADC_SR_EOS
#define ADC_FLAG_OVR                                ADC_SR_OVR
#define ADC_FLAG_STRT                               ADC_SR_STRT
#define ADC_FLAG_JSTRT                              ADC_SR_JSTRT

#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD)   || ((FLAG) == ADC_FLAG_ADRDY)|| \
                               ((FLAG) == ADC_FLAG_EOSMP) || ((FLAG) == ADC_FLAG_EOC)  || \
                               ((FLAG) == ADC_FLAG_JEOC)  || ((FLAG) == ADC_FLAG_EOSEQ)|| \
                               ((FLAG) == ADC_FLAG_JEOSEQ)|| ((FLAG) == ADC_FLAG_EOS)  || \
                               ((FLAG) == ADC_FLAG_STRT)  || ((FLAG) == ADC_FLAG_JSTRT)  || \
                               ((FLAG) == ADC_FLAG_OVR))
/**
  * @}
  */
  
/**
  * @}
  */ 

/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */ 

/*  Function used to set the ADC configuration to the default reset state *****/
void ADC_DeInit(ADC_TypeDef* ADCx);

/* Initialization and Configuration functions *********************************/ 
void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
void ADC_ClockModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ClockMode);
void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_BiasCurrentConfig(ADC_TypeDef* ADCx, uint32_t Current);

/* Power saving functions *****************************************************/
void ADC_WaitModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);

/* Analog Watchdog configuration functions ************************************/
void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_InjectedAnalogWatchdogCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,uint16_t LowThreshold);
void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog_Channel);
void ADC_AnalogWatchdogSingleChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState);

/* Temperature Sensor , Vrefint and Vbat management function ******************/
void ADC_TempSensorCmd(FunctionalState NewState);

/* Channels Configuration functions *******************************************/
void ADC_SampleTimeConfig(ADC_TypeDef* ADCx, uint32_t ADC_SampleTime);
void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t Rank, uint32_t ADC_SampleTime);
void ADC_RegularSequencerLengthConfig(ADC_TypeDef* ADCx, uint32_t Length);
void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t Rank, uint32_t ADC_SampleTime);
void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint32_t Length);
void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_OverrunModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_StopOfConversion(ADC_TypeDef* ADCx);
void ADC_StopOfInjectedConversion(ADC_TypeDef* ADCx);
void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx);
void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx);
uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
int16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint32_t Rank);
void ADC_InjectedOffsetConfig(ADC_TypeDef* ADCx, uint32_t Rank, uint32_t Value);
void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint32_t Number);
void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint32_t ADC_InjectedChannel, uint32_t Offset);
void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
void ADC_ExternalTrigConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigregularConv);
void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);

/* Regular Channels DMA Configuration functions *******************************/
void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);

/* Interrupts and flags management functions **********************************/
void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState);
FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG);
ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT);
void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT);


#ifdef __cplusplus
}
#endif

#endif /* __YS32F030_ADC_H */

/**
  * @}
  */ 

/**
  * @}
  */ 
